yosys/techlibs/xilinx
Eddie Hung 02973474df Remove extra newline 2019-06-03 20:04:47 -07:00
..
tests
.gitignore
Makefile.inc
arith_map.v
brams.txt
brams_bb.v
brams_init.py
brams_map.v
cells_map.v
cells_sim.v
cells_xtra.sh
cells_xtra.v
drams.txt
drams_map.v
ff_map.v
lut_map.v
synth_xilinx.cc