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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-05 03:32:09 +02:00
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73d611990d7f39b4e14ffc367c646686f0d2b209
yosys/passes
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whitequark baf1875307 Merge pull request #2529 from zachjs/unnamed-genblk
verilog: significant block scoping improvements
2021-02-04 09:57:28 +00:00
..
cmds
scc: Add -specify option to find loops in boxes
2021-01-26 16:23:08 +00:00
equiv
use the new isPublic() in a few places
2020-09-14 12:43:18 +02:00
fsm
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
hierarchy
Sign extend port connections where necessary
2020-12-18 20:33:14 -07:00
memory
memory_dff: Fix needlessly duplicating enable bits.
2020-10-22 13:03:42 +02:00
opt
opt_share: Fix X and CO signal width for shifted $alu in opt_share.
2021-01-14 14:54:08 +01:00
pmgen
passes/pmgen/pmgen.py: trivial change to remove C++ compiler warnings
2020-12-23 14:38:25 -08:00
proc
proc: Add -nomux switch
2020-08-20 22:58:08 +02:00
sat
Add #include needed to build with gcc-11
2020-11-26 06:12:12 -05:00
techmap
Merge pull request #2529 from zachjs/unnamed-genblk
2021-02-04 09:57:28 +00:00
tests
Replace "ILANG" with "RTLIL" everywhere.
2020-08-26 17:29:32 +00:00
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