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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-06 20:12:09 +02:00
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72a7d9eb1fa3cb12201ea5c9d2a8dacb69eaf4e8
yosys/tests/arch
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Miodrag Milanovic ebf286ab40 Code cleanup
2026-08-04 17:18:22 +02:00
..
analogdevices
Merge pull request #5973 from YosysHQ/lofty/abc-refactor-7
2026-07-09 08:46:46 +00:00
anlogic
Convert gen-tests shell script to python
2026-04-16 11:00:44 +02:00
common
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
ecp5
Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
efinix
Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
fabulous
Cleanup
2026-07-08 08:34:01 +02:00
gatemate
synth_gatemate: add -abc_new option
2026-05-06 14:02:48 +01:00
gowin
Merge pull request #5973 from YosysHQ/lofty/abc-refactor-7
2026-07-09 08:46:46 +00:00
ice40
Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
intel_alm
Merge pull request #5973 from YosysHQ/lofty/abc-refactor-7
2026-07-09 08:46:46 +00:00
machxo2
Convert gen-tests shell script to python
2026-04-16 11:00:44 +02:00
microchip
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
nanoxplore
Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
nexus
Code cleanup
2026-08-04 17:18:22 +02:00
quicklogic
Merge pull request #5973 from YosysHQ/lofty/abc-refactor-7
2026-07-09 08:46:46 +00:00
xilinx
xilinx_srl: keep the clock enable on FDRE shift registers
2026-07-20 23:59:40 -07:00
generate_mk.py
Move output redirect to one place
2026-04-16 11:00:44 +02:00
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