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luke
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yosys
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72a7d9eb1fa3cb12201ea5c9d2a8dacb69eaf4e8
yosys
/
techlibs
/
anlogic
T
History
Miodrag Milanovic
a689342207
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
..
anlogic_eqn.cc
…
anlogic_fixcarry.cc
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
arith_map.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
brams_map.v
…
brams.txt
…
cells_map.v
…
cells_sim.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
CMakeLists.txt
Migrate build system to CMake
2026-06-03 08:58:10 +00:00
eagle_bb.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
lutrams_map.v
…
lutrams.txt
…
synth_anlogic.cc
Add check before flatten in synth_*.
2026-05-05 14:06:58 +02:00
