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luke
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yosys
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724cead61d07906bf652c2d4b0f18360b6a13a29
yosys
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techlibs
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Clifford Wolf
8520b7fbe0
Added support for initialized xilinx brams
2015-04-06 17:07:10 +02:00
..
cmos
Fixes in cmos_cells.v
2015-03-25 09:00:41 +01:00
common
make all vector-size related integer params in $mem sim model signed
2015-04-05 17:26:53 +02:00
ice40
Added very first version of "synth_ice40"
2015-03-05 20:37:55 +01:00
xilinx
Added support for initialized xilinx brams
2015-04-06 17:07:10 +02:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00