Akash Levy 721214c55b Merge branch 'YosysHQ:main' into main		2025-07-27 03:39:36 -07:00
..
aiger	rtlil: represent Const strings as std::string	2024-10-14 06:28:12 +02:00
aiger2	aiger2: Clean debug print	2024-12-10 14:27:55 +01:00
ast	Merge pull request #4959 from YosysHQ/krys/primitive_array_error	2025-07-21 10:26:00 +12:00
blif	Resolve reg naming to some extent	2024-12-17 12:11:39 -08:00
json	fix handling of escaped chars in json backend and frontend	2022-02-18 17:13:09 +01:00
liberty	Liberty file caching with new `libcache` command	2025-04-03 13:39:35 +02:00
rpc	Fitting help messages to 80 character width	2022-08-24 10:40:57 +12:00
rtlil	read_rtlil: warn on assigns after switches in case rules	2024-11-21 22:41:13 +01:00
verific	Merge branch 'YosysHQ:main' into main	2025-07-15 00:04:28 -04:00
verilog	verilog: add support for SystemVerilog string literals.	2025-07-03 20:51:12 -06:00