Marcelina Kościelnicka 71dfbf33b2 Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.

2022-06-02 23:16:12 +02:00

..

tests

Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder"

2019-08-12 12:06:45 -07:00

abc9_model.v

Fix icestorm links

2021-06-09 12:39:12 +02:00

arith_map.v

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

brams_map.v

ice40: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

brams.txt

ice40: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

cells_map.v

Add force_downto and force_upto wire attributes.

2020-05-19 01:42:40 +02:00

cells_sim.v

Fixed Verific parser error in ice40 cell library

2021-10-19 12:33:18 +02:00

dsp_map.v

Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing

2019-08-08 12:56:05 -07:00

ff_map.v

ice40: Use dfflegalize.

2020-07-05 05:12:09 +02:00

ice40_braminit.cc

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

ice40_opt.cc

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

latches_map.v

Added synth_ice40 support for latches via logic loops

2016-05-06 23:02:37 +02:00

Makefile.inc

ice40: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

spram_map.v

ice40: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

spram.txt

ice40: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

synth_ice40.cc

Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.

2022-06-02 23:16:12 +02:00