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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-03 03:13:21 +02:00
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6dbe1d4c92ffecaa0c6be57c3eb34fbb2c5266c2
yosys/techlibs
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Clifford Wolf 8a69759306 Add techlibs/xilinx/lut2lut.v
2017-07-10 12:09:05 +02:00
..
altera_intel
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00
common
Add dff2ff.v techmap file
2017-05-31 11:45:58 +02:00
coolrunner2
Fix some c++ clang compiler errors
2017-07-03 19:38:30 +02:00
gowin
…
greenpak4
greenpak4_counters: Changed generation of primitive names so that the absorbed register's name is included
2017-06-24 14:54:07 -07:00
ice40
…
xilinx
Add techlibs/xilinx/lut2lut.v
2017-07-10 12:09:05 +02:00
.gitignore
…
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