Emil J. Tywoniak 0c64152d7a gowin: replace positional arguments in cells_sim.v with named

2026-07-17 23:33:02 +02:00

..

adc.v

End of file fix

2026-06-23 07:23:41 +02:00

arith_map.v

End of file fix

2026-06-23 07:23:41 +02:00

brams_map_gw5a.v

gowin: Fix bram ADA byte enables

2026-02-22 09:00:37 +01:00

brams_map.v

gowin: Fix bram ADA byte enables

2026-02-22 09:00:37 +01:00

brams.txt

GOWIN. Disable read-before-write mode.

2026-03-05 09:17:37 +10:00

cells_latch.v

gowin: add hardware latch support (DL/DLN/DLC/DLP variants)

2026-03-05 16:04:23 +01:00

cells_map.v

…

cells_sim.v

gowin: replace positional arguments in cells_sim.v with named

2026-07-17 23:33:02 +02:00

cells_xtra_gw1n.v

Remove trailing whitespaces

2026-06-23 07:24:59 +02:00

cells_xtra_gw2a.v

Remove trailing whitespaces

2026-06-23 07:24:59 +02:00

cells_xtra_gw5a.v

Remove trailing whitespaces

2026-06-23 07:24:59 +02:00

cells_xtra.py

End of file fix

2026-06-23 07:23:41 +02:00

CMakeLists.txt

Migrate build system to CMake

2026-06-03 08:58:10 +00:00

dsp_map.v

…

lutrams_map.v

…

lutrams.txt

…

synth_gowin.cc

Add check before flatten in synth_*.

2026-05-05 14:06:58 +02:00