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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-29 09:30:28 +02:00
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6574553189fb6ccb5d00a0c043671a625672b3d3
yosys/techlibs/ecp5
T
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Marcelina Kościelnicka 71dfbf33b2 Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.
2022-06-02 23:16:12 +02:00
..
tests
ecp5: Add simulation equivalence check for Diamond FF implementations
2019-08-30 13:27:36 +01:00
arith_map.v
Use HTTPS for website links, gatecat email
2021-06-09 12:16:56 +02:00
brams_map.v
ecp5: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
brams.txt
ecp5: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
cells_bb.v
Add missing parameters for ecp5
2022-04-25 15:31:41 +01:00
cells_ff.vh
Fix bitwidth mismatch; suppresses iverilog warning
2019-12-11 13:02:07 -08:00
cells_io.vh
ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.
2019-08-30 10:05:09 +00:00
cells_map.v
ecp5: Add support for mapping aldff.
2021-10-27 16:18:05 +02:00
cells_sim.v
Add missing parameters for ecp5
2022-04-25 15:31:41 +01:00
dsp_map.v
ecp5: Force SIGNED ports to be 1 bit
2020-04-16 16:38:19 +01:00
ecp5_gsr.cc
Use HTTPS for website links, gatecat email
2021-06-09 12:16:56 +02:00
latches_map.v
ecp5: Add latch inference
2018-10-19 15:16:40 +01:00
lutrams_map.v
ecp5: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
lutrams.txt
ecp5: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
Makefile.inc
ecp5: Use memory_libmap pass.
2022-05-18 17:32:56 +02:00
synth_ecp5.cc
Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.
2022-06-02 23:16:12 +02:00
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