yosys/techlibs/gowin at 64d62710de4f1db0d59d7fa04b3fb4d51c8dff2e - yosys - Gitea: Git with a cup of tea

luke/yosys

mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-04 19:31:00 +02:00

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Miodrag Milanovic 28b7053a01 Fix formatting for msys2 mingw build using GetSize

2019-08-01 17:27:34 +02:00

..

arith_map.v

Reduce amount of trailing whitespace in code base

2019-02-28 14:58:11 -08:00

bram.txt

GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

2019-04-12 23:40:02 -05:00

brams_init3.vh

GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

2019-04-12 23:40:02 -05:00

brams_map.v

GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

2019-04-12 23:40:02 -05:00

cells_map.v

GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

2019-04-12 23:40:02 -05:00

cells_sim.v

GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

2019-04-12 23:40:02 -05:00

determine_init.cc

Fix formatting for msys2 mingw build using GetSize

2019-08-01 17:27:34 +02:00

dram.txt

GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

2019-04-12 23:40:02 -05:00

drams_map.v

GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

2019-04-12 23:40:02 -05:00

Makefile.inc

GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow

2019-04-12 23:40:02 -05:00

synth_gowin.cc

Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master

2019-04-22 09:09:27 +02:00