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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-03 19:19:48 +02:00
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640b9927fae23d3127cc9ecb56ccbc8a2c66afbe
yosys/passes
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Miodrag Milanovic 81c2b92bb4 Add _pm.h files to GENLIST, fixes vcxsrc target
2021-03-11 15:56:32 +01:00
..
cmds
Add support for memory writes in processes.
2021-03-08 20:16:29 +01:00
equiv
use the new isPublic() in a few places
2020-09-14 12:43:18 +02:00
fsm
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
hierarchy
Sign extend port connections where necessary
2020-12-18 20:33:14 -07:00
memory
memory_dff: Remove now-useless write port handling.
2021-03-08 20:16:29 +01:00
opt
opt_share: Fix X and CO signal width for shifted $alu in opt_share.
2021-01-14 14:54:08 +01:00
pmgen
Add _pm.h files to GENLIST, fixes vcxsrc target
2021-03-11 15:56:32 +01:00
proc
Add support for memory writes in processes.
2021-03-08 20:16:29 +01:00
sat
sim: Avoid a crash on empty cell connection.
2021-03-08 17:03:31 +01:00
techmap
Replace assert in abc9_ops with more useful error message
2021-03-07 18:52:14 +01:00
tests
Replace "ILANG" with "RTLIL" everywhere.
2020-08-26 17:29:32 +00:00
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