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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-01 18:47:29 +02:00
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63dfbb18cfb34d72746565a3eb3ffbcd7451cdab
yosys/passes
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Johann Glaser 684c85902d be more verbose when techmap yielded processes
2014-05-26 17:13:41 +02:00
..
abc
- kernel/register.h, kernel/driver.cc: refactor rewrite_yosys_exe()/get_share_file_name() to portable proc_self_dirname()/proc_share_dirname().
2014-03-12 23:17:14 +01:00
cmds
fixed syntax error in dot file created by "show" command
2014-05-10 16:22:56 +02:00
fsm
Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys
2014-03-11 14:24:24 +01:00
hierarchy
Implemented read_verilog -defer
2014-02-13 13:59:13 +01:00
memory
Fixed bug in collecting of RD_TRANSPARENT parameter in memory_collect
2014-02-08 19:13:19 +01:00
opt
Fixed bug in opt_reduce (see vloghammer issue_044)
2014-05-12 12:45:47 +02:00
proc
Added workaround for vhdl-style edge triggers from vhdl2verilog to proc_arst
2014-02-21 23:34:45 +01:00
sat
Small improvement in SAT log messages
2014-03-13 13:12:49 +01:00
techmap
be more verbose when techmap yielded processes
2014-05-26 17:13:41 +02:00
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