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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-03 00:43:02 +02:00
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5d93dcce862d281f0df495eeee755cd4bfca342d
yosys/frontends/ast
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Clifford Wolf 5d93dcce86 Fix $readmem[hb] for mem2reg memories, fixes #785
Signed-off-by: Clifford Wolf <[email protected]>
2019-03-02 09:58:20 -08:00
..
ast.cc
Fix typographical and grammatical errors and inconsistencies.
2019-01-02 13:12:17 +00:00
ast.h
Use mem2reg on memories that only have constant-index write ports
2019-03-01 13:35:09 -08:00
dpicall.cc
Fixed trailing whitespaces
2015-07-02 11:14:30 +02:00
genrtlil.cc
Fixes related to handling of autowires and upto-ranges, fixes #814
2019-02-21 18:40:11 +01:00
Makefile.inc
Added Verilog/AST support for DPI functions (dpi_call() still unimplemented)
2014-08-21 12:43:51 +02:00
simplify.cc
Fix $readmem[hb] for mem2reg memories, fixes #785
2019-03-02 09:58:20 -08:00
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