yosys/techlibs/xilinx at 5b41470e151e3b1019e87dfddf900cea51922409 - yosys - Gitea: Git with a cup of tea

luke/yosys

mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-07 20:36:44 +02:00

Files

T

History

Clifford Wolf bebbf2e5a4 no support for 6-series xilinx devices

2015-02-01 23:06:44 +01:00

..

Added Xilinx example for Basys3 board

2015-02-01 17:09:34 +01:00

Various cleanups in xilinx techlib

2015-01-18 19:43:54 +01:00

arith_map.v

Various cleanups in xilinx techlib

2015-01-18 19:43:54 +01:00

brams_map.v

Added missing ports and parameters to xilinx brams

2015-02-01 15:42:59 +01:00

brams.txt

Various cleanups in xilinx techlib

2015-01-18 19:43:54 +01:00

cells_map.v

Various cleanups in xilinx techlib

2015-01-18 19:43:54 +01:00

cells_sim.v

Added Xilinx example for Basys3 board

2015-02-01 17:09:34 +01:00

Makefile.inc

Various cleanups in xilinx techlib

2015-01-18 19:43:54 +01:00

synth_xilinx.cc

no support for 6-series xilinx devices

2015-02-01 23:06:44 +01:00