Justin Zaun 9288889e20 gowin: add hardware latch support (DL/DLN/DLC/DLP variants) ... Add simulation models, techmap, and dfflegalize rules for Gowin DL-series latch primitives. Latches use the same physical BEL as DFFs with REGMODE set to LATCH. All 12 variants are supported: DL, DLE, DLN, DLNE, DLC, DLCE, DLNC, DLNCE, DLP, DLPE, DLNP, DLNPE.		2026-03-05 16:04:23 +01:00
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add_sub.ys	Add some tests	2019-10-21 16:25:15 +02:00
adffs.ys	update test	2019-12-03 16:56:15 +01:00
bug5688.ys	tests/arch/gowin: Add wr_en test	2026-02-22 09:00:37 +01:00
compare.v	gowin: Fix X output of $alu techmap	2023-05-01 17:56:41 +02:00
compare.ys	gowin: Fix X output of $alu techmap	2023-05-01 17:56:41 +02:00
counter.ys	ice40, ecp5, gowin: enable ABC9 by default	2023-11-13 15:28:13 +00:00
dffs.ys	Add some tests	2019-10-21 16:25:15 +02:00
fsm.ys	fix fsm test with proper clock enable polarity	2019-11-11 17:51:26 +01:00
init-error.ys	gowin: Use dfflegalize.	2020-07-06 12:27:46 +02:00
init.v	attempt to fix formatting	2019-11-25 14:50:34 +01:00
init.ys	ice40, ecp5, gowin: enable ABC9 by default	2023-11-13 15:28:13 +00:00
latches.ys	gowin: add hardware latch support (DL/DLN/DLC/DLP variants)	2026-03-05 16:04:23 +01:00
logic.ys	Add some tests	2019-10-21 16:25:15 +02:00
lutram.ys	gowin: Fix LUT RAM inference, add more models.	2022-02-09 09:04:34 +01:00
mul_gw1n.ys	gowin: dsp: Add mult inference tests	2026-02-12 14:12:32 +03:00
mul_gw2a.ys	gowin: dsp: Add mult inference tests	2026-02-12 14:12:32 +03:00
mux.ys	gowin: fix test	2025-09-23 20:03:50 +02:00
run-test.sh	test: restore verific handling, nicer naming	2024-12-13 10:24:47 +01:00
shifter.ys	Add some tests	2019-10-21 16:25:15 +02:00
tribuf.ys	Gowin: deal with active-low tristate (#2971)	2021-08-20 21:21:06 +02:00