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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-08 12:44:23 +02:00
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59facfa98c82ad019980ecbc92d74e01e0bc3e7a
yosys/techlibs/intel_alm/common
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History
Lofty 9f7a55c99f intel_alm: M10K write-enable is negative-true
2022-03-09 20:18:06 +00:00
..
abc9_map.v
…
abc9_model.v
…
abc9_unmap.v
…
alm_map.v
…
alm_sim.v
intel_alm: preliminary Arria V support
2021-11-25 17:20:36 +01:00
arith_alm_map.v
…
bram_m10k_map.v
intel_alm: M10K write-enable is negative-true
2022-03-09 20:18:06 +00:00
bram_m10k.txt
intel_alm: M10K write-enable is negative-true
2022-03-09 20:18:06 +00:00
bram_m20k_map.v
…
bram_m20k.txt
…
dff_map.v
…
dff_sim.v
intel_alm: preliminary Arria V support
2021-11-25 17:20:36 +01:00
dsp_map.v
…
dsp_sim.v
intel_alm: preliminary Arria V support
2021-11-25 17:20:36 +01:00
lutram_mlab.txt
…
megafunction_bb.v
CycloneV: Add (passthrough) support for cyclonev_oscillator
2021-10-17 20:00:03 +02:00
mem_sim.v
intel_alm: M10K write-enable is negative-true
2022-03-09 20:18:06 +00:00
misc_sim.v
…
quartus_rename.v
intel_alm: M10K write-enable is negative-true
2022-03-09 20:18:06 +00:00
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