yosys/backends
Jannis Harder 596da3f2a6
Merge pull request #3815 from charlottia/py312-syntax
2023-06-26 16:36:58 +02:00
..
aiger Merge pull request #3778 from jix/yw_clk2fflogic 2023-06-05 16:15:04 +02:00
blif
btor Use clk2fflogic attr on cells to track original FF names in witnesses 2023-05-25 12:48:02 +02:00
cxxrtl
edif Improve EDIF lib_cell_ports scan 2023-06-20 10:42:05 +02:00
firrtl backends/firrtl: Ensure `modInstance` is valid 2023-02-03 08:27:52 -05:00
intersynth
jny Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
json Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
rtlil backends/rtlil: Do not shorten a value with z bits to 'x 2023-01-29 14:02:25 +01:00
simplec
smt2 Merge pull request #3815 from charlottia/py312-syntax 2023-06-26 16:36:58 +02:00
smv
spice
table
verilog verilog_backend: Do not run bwmuxmap even if in expr mode 2023-02-13 14:00:38 +01:00