Clifford Wolf 52bb1b968d Added $sop cell type and "abc -sop"

2016-06-17 13:50:09 +02:00

..

ast

Fixed procedural assignments to non-unique lvalues, e.g. {y,y} = {a,b}

2016-05-27 17:55:03 +02:00

blif

Added $sop cell type and "abc -sop"

2016-06-17 13:50:09 +02:00

ilang

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

liberty

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

verific

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

verilog

Small improvements in Verilog front-end docs

2016-05-20 16:21:35 +02:00

vhdl2verilog

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00