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yosys/techlibs
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Clifford Wolf c329233f0d Added output args to synth_ice40 2015-05-26 17:08:53 +02:00
..
cmos Fixes in cmos_cells.v 2015-03-25 09:00:41 +01:00
common Added simplemap $lut support 2015-04-27 10:16:07 +02:00
ice40 Added output args to synth_ice40 2015-05-26 17:08:53 +02:00
xilinx Added output args to synth_ice40 2015-05-26 17:08:53 +02:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00