Clifford Wolf e907ee4fde Merge pull request #1490 from YosysHQ/clifford/autoname ...

Add "autoname" pass and use it in "synth_ice40"

2019-11-14 18:03:44 +01:00

..

cmds

Add "autoname" pass and use it in "synth_ice40"

2019-11-13 13:41:16 +01:00

equiv

Add -async2sync to help text as per @daveshah1

2019-10-04 10:17:46 -07:00

fsm

Update fsm_detect bugfix

2019-11-12 17:31:30 +01:00

hierarchy

Adopt @cliffordwolf's suggestion

2019-09-03 12:18:50 -07:00

memory

stoi -> atoi

2019-08-07 11:09:17 -07:00

opt

Revert "SigSet<Cell*> to use stable compare class"

2019-09-13 09:49:15 -07:00

pmgen

Makefile: don't assume python is called python3

2019-10-19 14:04:52 +08:00

proc

proc_clean: fix order of switch insertion.

2019-08-19 16:44:23 +00:00

sat

Revert "Be mindful that sigmap(wire) could have dupes when checking \init"

2019-10-08 12:41:24 -07:00

techmap

flowmap: when doing mincut, ensure source is always in X, not X̅.

2019-11-12 00:15:43 +00:00

tests

Document (* gentb_skip *) attr for test_autotb

2019-09-18 12:41:35 -07:00