Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 18:13:40 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
4d80bc24c714f700519a2191a8929fe2136e45a3
yosys/frontends
T
History
Miodrag Milanovic 1cc281ca6f verific: allow memories to be inferred in loops (vhdl)
2022-04-18 09:10:28 +02:00
..
aiger
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
ast
sv: fix always_comb auto nosync for nested and function blocks
2022-04-05 14:43:48 -06:00
blif
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
json
fix handling of escaped chars in json backend and frontend
2022-02-18 17:13:09 +01:00
liberty
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
rpc
Fix argument handling in connect_rpc
2020-10-19 13:40:57 +02:00
rtlil
Specify minimum bison version 3.0+
2021-10-01 21:18:33 -06:00
verific
verific: allow memories to be inferred in loops (vhdl)
2022-04-18 09:10:28 +02:00
verilog
verilog: support for time scale delay values
2022-02-14 15:58:31 +01:00
Powered by Gitea Version: 1.27.2 Page: 67ms Template: 2ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API