yosys/techlibs/ecp5
Eddie Hung b304744d15 Clean up 2019-06-18 09:50:37 -07:00
..
.gitignore
Makefile.inc ecp5: Add abc9 option 2019-06-14 17:15:02 +01:00
abc_5g.box ecp5: Add abc9 option 2019-06-14 17:15:02 +01:00
abc_5g.lut ecp5: Add abc9 option 2019-06-14 17:15:02 +01:00
arith_map.v ecp5: Increase threshold for ALU mapping 2019-01-21 12:33:47 +00:00
bram.txt
brams_connect.py
brams_init.py
brams_map.v ecp5: Disable LSR inversion 2018-10-16 12:48:39 +01:00
cells_bb.v ecp5: Add DDRDLLA 2019-02-19 19:34:37 +00:00
cells_map.v Clean up 2019-06-18 09:50:37 -07:00
cells_sim.v Comment out dist RAM boxing on ECP5 for now 2019-06-14 10:42:30 -07:00
dram.txt
drams_map.v
ecp5_ffinit.cc ecp5: Demote conflicting FF init values to a warning 2019-03-04 11:26:20 +00:00
latches_map.v ecp5: Add latch inference 2018-10-19 15:16:40 +01:00
synth_ecp5.cc ecp5: Add abc9 option 2019-06-14 17:15:02 +01:00