Sylvain Munaut 4f9183d107 ice40/cells_sim.v: Add support for TRIM input to SB_HFOSC ... Signed-off-by: Sylvain Munaut <tnt@246tNt.com>		2019-05-13 12:51:06 +02:00
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tests	Bugfix in ice40_dsp	2019-02-21 13:28:46 +01:00
.gitignore	…
Makefile.inc	ice40: Add ice40_braminit pass to allow initialization of BRAM from file	2019-03-08 00:15:46 +01:00
arith_map.v	…
brams.txt	…
brams_init.py	…
brams_map.v	ice40: use 2 bits for READ/WRITE MODE for SB_RAM map	2019-02-28 16:23:40 -08:00
cells_map.v	…
cells_sim.v	ice40/cells_sim.v: Add support for TRIM input to SB_HFOSC	2019-05-13 12:51:06 +02:00
ice40_braminit.cc	Fix typo in ice40_braminit help msg	2019-03-09 13:24:55 -08:00
ice40_ffinit.cc	…
ice40_ffssr.cc	…
ice40_opt.cc	…
ice40_unlut.cc	…
latches_map.v	…
synth_ice40.cc	Merge pull request #969 from YosysHQ/clifford/pmgenstuff	2019-05-03 20:39:50 +02:00