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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-08 20:47:34 +02:00
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4a4e28b55eb24ec4e83b092bf8478bb8149669c0
yosys/techlibs
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Miodrag Milanovic e9c5f1b346 Fix formatting for msys2 mingw build using GetSize
2019-08-02 16:55:14 +02:00
..
achronix
Reduce amount of trailing whitespace in code base
2019-02-28 14:58:11 -08:00
anlogic
Fix formatting for msys2 mingw build using GetSize
2019-08-02 16:55:14 +02:00
common
Add "wreduce -keepdc", fixes #1016
2019-05-20 15:36:13 +02:00
coolrunner2
Unify usage of noflatten among architectures
2019-01-04 11:37:25 +01:00
easic
Fix typographical and grammatical errors and inconsistencies.
2019-01-02 13:12:17 +00:00
ecp5
Merge pull request #1138 from YosysHQ/koriakin/xc7nocarrymux
2019-06-27 06:04:56 -07:00
gowin
Fix formatting for msys2 mingw build using GetSize
2019-08-02 16:55:14 +02:00
greenpak4
techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut module
2019-02-26 09:40:46 -08:00
ice40
Fixed small typo in ice40_unlut help summary
2019-06-19 16:39:46 -04:00
intel
Fix formatting for synth_intel.cc
2019-05-09 08:40:05 -07:00
sf2
Add link to SF2 / igloo2 macro library guide
2019-03-07 09:08:26 -08:00
xilinx
synth_xilinx -arch -> -family, consistent with older synth_intel
2019-06-27 07:24:47 -07:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00
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