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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 18:13:40 +02:00
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4585d60b8aae42c4cedf43a22d649e4d7fe823ff
yosys/techlibs/common
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Martin Povišer f7d4a855c6 techlibs: Add cmp2softlogic.v to common
2023-11-13 10:42:12 +01:00
..
.gitignore
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abc9_map.v
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abc9_model.v
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abc9_unmap.v
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adff2dff.v
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cellhelp.py
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cells.lib
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cmp2lcu.v
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cmp2lut.v
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cmp2softlogic.v
techlibs: Add cmp2softlogic.v to common
2023-11-13 10:42:12 +01:00
dff2ff.v
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gate2lut.v
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gen_fine_ffs.py
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Makefile.inc
techlibs: Add cmp2softlogic.v to common
2023-11-13 10:42:12 +01:00
mul2dsp.v
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pmux2mux.v
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prep.cc
Run future as part of prep
2023-09-13 11:32:36 +02:00
simcells.v
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simlib.v
Support import of $future_ff
2023-09-13 11:32:36 +02:00
smtmap.v
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synth.cc
mult -> booth in synth.cc, to turn on use synth -booth
2023-09-08 16:44:59 -07:00
techmap.v
Add bitwise $bweqx and $bwmux cells
2022-11-30 18:24:35 +01:00
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