Clifford Wolf 41ed6ca7a5 Fix sim for assignments with lhs<rhs size, fixes #1565 ...

Signed-off-by: Clifford Wolf <[email protected]>

2019-12-17 17:36:30 +01:00

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cmds

Add "autoname" pass and use it in "synth_ice40"

2019-11-13 13:41:16 +01:00

equiv

Add -async2sync to help text as per @daveshah1

2019-10-04 10:17:46 -07:00

fsm

Update fsm_detect bugfix

2019-11-12 17:31:30 +01:00

hierarchy

Adopt @cliffordwolf's suggestion

2019-09-03 12:18:50 -07:00

memory

Enforce non-existence

2019-12-16 17:06:30 -08:00

opt

Fix opt_expr.eqneq.cmpzero debug print

2019-12-15 20:40:38 +01:00

pmgen

ice40_wrapcarry -unwrap to preserve 'src' attribute

2019-12-09 14:28:54 -08:00

proc

proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage

2019-11-21 20:46:41 +00:00

sat

Fix sim for assignments with lhs<rhs size, fixes #1565

2019-12-17 17:36:30 +01:00

techmap

iopadmap: Refactor and fix tristate buffer mapping. (#1527)

2019-12-04 08:44:08 +01:00

tests

Document (* gentb_skip *) attr for test_autotb

2019-09-18 12:41:35 -07:00