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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-03 11:18:31 +02:00
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419f91a2b99fbd1b61b09682947dbb782c19a97d
yosys/passes/proc
T
History
Miodrag Milanovic 6574553189 Fixes for some of clang scan-build detected issues
2023-01-17 12:58:08 +01:00
..
Makefile.inc
Add proc_rom pass.
2022-05-13 00:37:14 +02:00
proc_arst.cc
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
proc_clean.cc
rtlil: Make Process handling more uniform with Cell and Wire.
2021-07-12 00:47:34 +02:00
proc_dff.cc
Fixes for some of clang scan-build detected issues
2023-01-17 12:58:08 +01:00
proc_dlatch.cc
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
proc_init.cc
Delete unused found_init variable
2021-07-14 10:19:07 +01:00
proc_memwr.cc
proc_memwr: Use the v2 memwr cell.
2021-08-11 13:34:10 +02:00
proc_mux.cc
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
proc_prune.cc
proc_prune: Make assign removal and promotion per-bit, remember promoted bits.
2021-08-14 15:26:11 +02:00
proc_rmdead.cc
proc_rmdead: use explicit pattern set when there are no wildcards
2021-07-29 20:55:59 -04:00
proc_rom.cc
proc_rom: Add special handling of const-0 address bits.
2022-05-18 17:32:30 +02:00
proc.cc
Add proc_rom pass.
2022-05-13 00:37:14 +02:00
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