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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-29 01:24:25 +02:00
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3ec00cceaa62ad7e06bdaa0fa48eaaffeae8982c
yosys/tests/lut
T
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Eddie Hung 8a2a2cd035 Forgot to commit
2019-07-16 12:44:26 -07:00
..
.gitignore
gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.
2018-12-05 17:13:27 +00:00
check_map_lut6.ys
Forgot to commit
2019-07-16 12:44:26 -07:00
check_map.ys
cmp2lut: new techmap pass.
2019-01-02 07:53:31 +00:00
map_and.v
gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.
2018-12-05 17:13:27 +00:00
map_cmp.v
Add tests for cmp2lut on LUT6
2019-07-16 12:11:59 -07:00
map_mux.v
gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.
2018-12-05 17:13:27 +00:00
map_not.v
gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.
2018-12-05 17:13:27 +00:00
map_or.v
gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.
2018-12-05 17:13:27 +00:00
map_xor.v
gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.
2018-12-05 17:13:27 +00:00
run-test.sh
Add tests for cmp2lut on LUT6
2019-07-16 12:11:59 -07:00
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