Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-29 01:24:25 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
30abdaf3b2e0c3f21af0a7fdf2dc91ea59c7d54f
yosys/techlibs/ecp5
T
History
whitequark f3a26730b6 ECP5: implement all Diamond I/O buffer primitives.
2019-06-06 10:18:33 +00:00
..
.gitignore
ecp5: First BRAM type maps successfully
2018-10-10 16:35:19 +01:00
arith_map.v
ecp5: Increase threshold for ALU mapping
2019-01-21 12:33:47 +00:00
bram.txt
ecp5: First BRAM type maps successfully
2018-10-10 16:35:19 +01:00
brams_connect.py
ecp5: Script for BRAM IO connections
2018-10-10 16:11:00 +01:00
brams_init.py
ecp5: First BRAM type maps successfully
2018-10-10 16:35:19 +01:00
brams_map.v
ecp5: Disable LSR inversion
2018-10-16 12:48:39 +01:00
cells_bb.v
ecp5: Add DDRDLLA
2019-02-19 19:34:37 +00:00
cells_map.v
ECP5: implement all Diamond I/O buffer primitives.
2019-06-06 10:18:33 +00:00
cells_sim.v
Fix ECP5 cells_sim for iverilog
2019-03-01 19:25:23 +01:00
dram.txt
ecp5: Don't map ROMs to DRAM
2018-10-01 18:34:41 +01:00
drams_map.v
ecp5: Adding DRAM map
2018-07-13 14:08:42 +02:00
ecp5_ffinit.cc
ecp5: Demote conflicting FF init values to a warning
2019-03-04 11:26:20 +00:00
latches_map.v
ecp5: Add latch inference
2018-10-19 15:16:40 +01:00
Makefile.inc
ecp5: Support for flipflop initialisation
2019-01-22 16:02:56 +00:00
synth_ecp5.cc
Add handling of init attributes in "opt_expr -undriven"
2019-04-30 14:46:12 +02:00
Powered by Gitea Version: 1.27.2 Page: 831ms Template: 3ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API