Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-08 12:44:23 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
2f2e76ac68dc8da8618ebbf602e2c871f5d4b1b8
yosys/frontends
T
History
Siesh1oo 2f2e76ac68 - frontends/vhdl2verilog/vhdl2verilog.cc, passes/abc/abc.cc: #include <climits> for PATH_MAX.
2014-03-10 19:50:02 +01:00
..
ast
Include id2ast pointers when dumping AST
2014-03-05 19:56:31 +01:00
ilang
Bugfix in ilang frontend autoidx recovery
2014-03-07 17:19:14 +01:00
liberty
Added ff and latch support to read_liberty
2014-02-15 19:44:19 +01:00
verific
Improved verific command (added support for some operators)
2014-03-10 12:06:57 +01:00
verilog
Added Verilog support for "`default_nettype none"
2014-02-17 14:28:52 +01:00
vhdl2verilog
- frontends/vhdl2verilog/vhdl2verilog.cc, passes/abc/abc.cc: #include <climits> for PATH_MAX.
2014-03-10 19:50:02 +01:00
Powered by Gitea Version: 1.27.2 Page: 401ms Template: 3ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API