Logo
Explore Help
Sign In
luke/yosys
Watch 1
Star 0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-03 03:13:21 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
2c8c8b3c74ccc630e56c412a83fa60fb7066fb4d
yosys/techlibs
T
History
Clifford Wolf 2c8c8b3c74 Merge pull request #1289 from mmicko/anlogic_fixes
Anlogic fixes and optimization
2019-08-22 18:09:10 +02:00
..
achronix
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
anlogic
Proper arith for Anlogic and use standard pass
2019-08-12 20:21:36 +02:00
common
Missing newline
2019-08-20 20:37:52 -07:00
coolrunner2
Fix spacing
2019-08-06 16:47:55 -07:00
easic
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
ecp5
Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithro
2019-08-19 09:56:17 -07:00
efinix
Fix missing newline at end of file
2019-08-22 18:06:36 +02:00
gowin
Fix formatting for msys2 mingw build using GetSize
2019-08-01 17:27:34 +02:00
greenpak4
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
ice40
Merge pull request #1304 from YosysHQ/eddie/abc9_refactor
2019-08-20 11:59:31 -07:00
intel
techlibs/intel: Clean up Makefile
2019-08-05 11:22:11 -07:00
sf2
Revert "synth_* with -retime option now calls abc with -D 1 as well"
2019-04-18 07:59:16 -07:00
xilinx
Merge pull request #1209 from YosysHQ/eddie/synth_xilinx
2019-08-20 12:55:26 -07:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00
Powered by Gitea Version: 1.27.2 Page: 581ms Template: 19ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API