yosys/techlibs at 2c40b667850578eb7bb2dceb3a9beda0fdbfe7e7 - yosys - Gitea: Git with a cup of tea

luke/yosys

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Eddie Hung 009255d11d Move neg-pol to pos-pol mapping from ff_map to cells_map.v

2019-06-12 16:07:24 -07:00

..

Revert "synth_* with -retime option now calls abc with -D 1 as well"

2019-04-18 07:59:16 -07:00

Revert "synth_* with -retime option now calls abc with -D 1 as well"

2019-04-18 07:59:16 -07:00

Merge remote-tracking branch 'origin/eddie/opt_rmdff' into xc7mux

2019-05-23 13:37:53 -07:00

Revert "synth_* with -retime option now calls abc with -D 1 as well"

2019-04-18 07:59:16 -07:00

Revert "synth_* with -retime option now calls abc with -D 1 as well"

2019-04-18 07:59:16 -07:00

ECP5: implement all Diamond I/O buffer primitives.

2019-06-06 10:18:33 +00:00

Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master

2019-04-22 09:09:27 +02:00

Revert "synth_* with -retime option now calls abc with -D 1 as well"

2019-04-18 07:59:16 -07:00

Remove abc_flop{,_d} attributes from ice40/cells_sim.v

2019-06-12 09:29:30 -07:00

Fix formatting for synth_intel.cc

2019-05-09 08:40:05 -07:00

Revert "synth_* with -retime option now calls abc with -D 1 as well"

2019-04-18 07:59:16 -07:00

Move neg-pol to pos-pol mapping from ff_map to cells_map.v

2019-06-12 16:07:24 -07:00

.gitignore

added .gitignore files

2013-01-05 11:19:11 +01:00