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mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 10:03:36 +02:00
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266993408a2b926ffefcf536feb92b36b11e398e
yosys/passes
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Diego H 266993408a Refactoring memory attribute matching based on IEEE 1364.1 and Tool specific
2019-12-13 15:43:24 -06:00
..
cmds
Add "autoname" pass and use it in "synth_ice40"
2019-11-13 13:41:16 +01:00
equiv
Add -async2sync to help text as per @daveshah1
2019-10-04 10:17:46 -07:00
fsm
Update fsm_detect bugfix
2019-11-12 17:31:30 +01:00
hierarchy
Adopt @cliffordwolf's suggestion
2019-09-03 12:18:50 -07:00
memory
Refactoring memory attribute matching based on IEEE 1364.1 and Tool specific
2019-12-13 15:43:24 -06:00
opt
opt_share: Fix handling of fine cells.
2019-11-27 08:01:07 +01:00
pmgen
ice40_wrapcarry -unwrap to preserve 'src' attribute
2019-12-09 14:28:54 -08:00
proc
proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage
2019-11-21 20:46:41 +00:00
sat
Revert "Be mindful that sigmap(wire) could have dupes when checking \init"
2019-10-08 12:41:24 -07:00
techmap
iopadmap: Refactor and fix tristate buffer mapping. (#1527)
2019-12-04 08:44:08 +01:00
tests
Document (* gentb_skip *) attr for test_autotb
2019-09-18 12:41:35 -07:00
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