clairexen d9dd8bc748 Merge pull request #2347 from YosysHQ/mwk/techmap-shift-fixes ... techmap/shift_shiftx: Remove the "shiftx2mux" special path.		2020-08-20 16:25:56 +02:00
..
.gitignore	…
Makefile.inc	…
abc9_map.v	techmap: Add support for [] wildcards in techmap_celltype.	2020-08-02 22:46:48 +02:00
abc9_model.v	…
abc9_unmap.v	abc9_ops: -reintegrate use SigMap to remove (* init *) from $_DFF_[NP]_	2020-05-29 17:17:40 -07:00
adff2dff.v	Add force_downto and force_upto wire attributes.	2020-05-19 01:42:40 +02:00
cellhelp.py	…
cells.lib	…
cmp2lcu.v	Add force_downto and force_upto wire attributes.	2020-05-19 01:42:40 +02:00
cmp2lut.v	Add force_downto and force_upto wire attributes.	2020-05-19 01:42:40 +02:00
dff2ff.v	Add force_downto and force_upto wire attributes.	2020-05-19 01:42:40 +02:00
gate2lut.v	…
gen_fine_ffs.py	simcells: Fix reset polarity for $_DLATCH_???_ cells.	2020-06-30 15:32:06 +02:00
mul2dsp.v	Add force_downto and force_upto wire attributes.	2020-05-19 01:42:40 +02:00
pmux2mux.v	…
prep.cc	Use C++11 final/override keywords.	2020-06-18 23:34:52 +00:00
simcells.v	simcells: Fix reset polarity for $_DLATCH_???_ cells.	2020-06-30 15:32:06 +02:00
simlib.v	Respect \A_SIGNED for $shift	2020-08-18 19:36:24 +02:00
synth.cc	Replace opt_rmdff with opt_dff.	2020-08-07 13:21:03 +02:00
techmap.v	techmap/shift_shiftx: Remove the "shiftx2mux" special path.	2020-08-20 12:44:09 +02:00