yosys/techlibs at 1f54b0008f6fe4e9ed19f5b4fcddddcb4d6d8976 - yosys - Gitea: Git with a cup of tea

luke/yosys

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Eddie Hung 1f54b0008f Merge pull request #1685 from dh73/gowin

Removing cells_sim from GoWin bram techmap

2020-02-06 20:59:21 -08:00

..

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

synth_*: call 'opt -fast' after 'techmap'

2020-02-05 18:39:01 -08:00

shiftx2mux: fix select out of bounds

2020-02-05 16:41:09 -08:00

synth_*: call 'opt -fast' after 'techmap'

2020-02-05 18:39:01 -08:00

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

synth_*: call 'opt -fast' after 'techmap'

2020-02-05 18:39:01 -08:00

synth_*: call 'opt -fast' after 'techmap'

2020-02-05 18:39:01 -08:00

Removing cells_sim.v from bram techmap pass

2020-02-06 14:38:29 -06:00

synth_*: call 'opt -fast' after 'techmap'

2020-02-05 18:39:01 -08:00

synth_*: call 'opt -fast' after 'techmap'

2020-02-05 18:39:01 -08:00

Add log_experimental() and experimental() API and "yosys -x"

2020-01-27 18:27:47 +01:00

synth_*: call 'opt -fast' after 'techmap'

2020-02-05 18:39:01 -08:00

xilinx: Add block RAM mapping for Virtex 2* and Spartan 3*.

2020-02-07 01:00:29 +01:00

.gitignore

added .gitignore files

2013-01-05 11:19:11 +01:00