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yosys
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1eae6025e7dccc021dcd2a6d658dae40ab02ef9e
yosys
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techlibs
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sf2
T
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Stefan Riesenberger
a58571d0fe
sf2: fix name of AND modules
2021-04-09 16:46:05 +02:00
..
arith_map.v
Basic SmartFusion2 and IGLOO2 synthesis support
2018-10-31 15:28:57 +01:00
cells_map.v
sf2: Use dfflegalize.
2020-07-09 21:56:14 +02:00
cells_sim.v
sf2: fix name of AND modules
2021-04-09 16:46:05 +02:00
Makefile.inc
sf2: replace sf2_iobs with {clkbuf,iopad}map
2020-07-09 21:28:52 +01:00
synth_sf2.cc
Blackbox all whiteboxes after synthesis
2021-03-17 21:07:20 +00:00
