N. Engelhardt 18afa36acd Merge pull request #4273 from YosysHQ/vhdl_params ...

verific: Improve import VHDL constants

2024-04-09 18:01:41 +02:00

..

aiger

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

ast

fmt: FmtPart::{STRING→LITERAL},{CHARACTER→STRING}.

2024-04-02 12:13:22 +02:00

blif

Issue a warning instead of a syntax error for blif delay constraints

2024-01-23 16:25:16 +00:00

json

fix handling of escaped chars in json backend and frontend

2022-02-18 17:13:09 +01:00

liberty

print filename in liberty log_header

2023-01-11 21:31:46 +01:00

rpc

Fitting help messages to 80 character width

2022-08-24 10:40:57 +12:00

rtlil

Specify minimum bison version 3.0+

2021-10-01 21:18:33 -06:00

verific

code split and cleanup

2024-03-19 09:15:04 +01:00

verilog

Resolve struct member multiple dimensions defined in stages with typedef

2024-02-11 11:26:52 -05:00