Eddie Hung 7a58ee78dc gen_lut to return correctly sized LUT mask

2019-07-16 12:45:29 -07:00

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.gitignore

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adff2dff.v

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cellhelp.py

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cells.lib

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cmp2lut.v

gen_lut to return correctly sized LUT mask

2019-07-16 12:45:29 -07:00

dff2ff.v

Add dff2ff.v techmap file

2017-05-31 11:45:58 +02:00

gate2lut.v

gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.

2018-12-05 17:13:27 +00:00

Makefile.inc

cmp2lut: new techmap pass.

2019-01-02 07:53:31 +00:00

pmux2mux.v

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prep.cc

Add "wreduce -keepdc", fixes #1016

2019-05-20 15:36:13 +02:00

simcells.v

Fix typo.

2018-12-05 17:13:27 +00:00

simlib.v

Improve $specrule interface

2019-04-23 22:57:10 +02:00

synth.cc

Revert "Add "synth -keepdc" option"

2019-07-09 10:14:23 -07:00

techmap.v

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