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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-05 03:32:09 +02:00
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124e759280fecf9e8698b7e09c5d9e87d8fb3f96
yosys/techlibs/common
T
History
Clifford Wolf 44b5bd4b63 Fixed simlib $macc model for xilinx xsim
2014-09-08 17:09:39 +02:00
..
adff2dff.v
Added adff2dff.v (for techmap -share_map)
2014-08-07 16:14:38 +02:00
blackbox.sed
Fixes and cleanups for blackbox.v
2014-09-08 13:31:04 +02:00
Makefile.inc
Added adff2dff.v (for techmap -share_map)
2014-08-07 16:14:38 +02:00
pmux2mux.v
Added techlibs/common/pmux2mux.v
2014-01-17 20:06:15 +01:00
simcells.v
Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $_OAI4_
2014-08-16 18:29:39 +02:00
simlib.v
Fixed simlib $macc model for xilinx xsim
2014-09-08 17:09:39 +02:00
techmap.v
Added $lcu cell type
2014-09-08 13:31:04 +02:00
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