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Marcin Kościelnicki b44d0e041f xilinx: use RAM32M/RAM64M for memories with two read ports

This fixes inefficient LUT RAM usage for memories with one write
and two read ports (commonly used as register files).

2020-02-02 14:34:21 +01:00

..

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

Merge pull request #1604 from whitequark/unify-ram-naming

2020-01-02 21:06:17 +00:00

Do not map $eq and $ne in cmp2lut, only proper arithmetic cmp

2019-11-11 15:07:29 +01:00

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

xilinx/ice40/ecp5: undo permuting LUT masks in lut_map

2020-01-27 13:30:27 -08:00

Merge pull request #1604 from whitequark/unify-ram-naming

2020-01-02 21:06:17 +00:00

Merge pull request #1604 from whitequark/unify-ram-naming

2020-01-02 21:06:17 +00:00

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

Fix $lut input ordering -- SigSpec(std::initializer_list<>) is backwards

2020-01-27 14:02:13 -08:00

Add log_experimental() and experimental() API and "yosys -x"

2020-01-27 18:27:47 +01:00

Update doc that "-retime" calls abc with "-dff -D 1"

2019-12-30 13:28:29 -08:00

xilinx: use RAM32M/RAM64M for memories with two read ports

2020-02-02 14:34:21 +01:00

.gitignore

added .gitignore files

2013-01-05 11:19:11 +01:00