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luke
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yosys
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https://github.com/YosysHQ/yosys.git
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0e5dbc4abc2fb3a0d98d2dfb07e8642058d69bb1
yosys
/
tests
/
arch
T
History
Pepijn de Vos
0e5dbc4abc
fix wide luts
2019-11-06 19:48:18 +01:00
..
anlogic
Common memory test now shared
2019-10-18 12:33:35 +02:00
common
fixed error
2019-10-18 13:15:36 +02:00
ecp5
Common memory test now shared
2019-10-18 12:33:35 +02:00
efinix
Common memory test now shared
2019-10-18 12:33:35 +02:00
gowin
fix wide luts
2019-11-06 19:48:18 +01:00
ice40
Common memory test now shared
2019-10-18 12:33:35 +02:00
xilinx
Common memory test now shared
2019-10-18 12:33:35 +02:00
run-test.sh
Add simcells.v, simlib.v, and some output
2019-06-27 11:13:49 -07:00
