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mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-30 01:48:17 +02:00
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0da65d498b9f18ce0c09eedc19f16db2390e6dcb
yosys/techlibs/coolrunner2
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R. Ou 7932672fc2 coolrunner2: Attempt to give wires/cells more meaningful names
2020-03-02 01:40:57 -08:00
..
cells_counter_map.v
coolrunner2: Use extract_counter to optimize counters
2020-02-17 03:09:40 -08:00
cells_latch.v
coolrunner2: Initial mapping of latches
2017-06-25 23:58:28 -07:00
cells_sim.v
coolrunner2: Add INVERT parameter to some BUFGs
2017-08-14 12:13:33 -07:00
coolrunner2_fixup.cc
coolrunner2: Attempt to give wires/cells more meaningful names
2020-03-02 01:40:57 -08:00
coolrunner2_sop.cc
coolrunner2: Attempt to give wires/cells more meaningful names
2020-03-02 01:40:57 -08:00
Makefile.inc
Merge pull request #1709 from rqou/coolrunner2_counter
2020-02-27 19:05:56 +01:00
synth_coolrunner2.cc
coolrunner2: Insert many more required feedthrough cells
2020-03-01 16:56:21 -08:00
tff_extract.v
coolrunner2: Add extraction for TFFs
2018-03-31 02:54:26 -07:00
xc2_dff.lib
coolrunner2: Initial mapping of DFFs
2017-06-25 23:58:28 -07:00
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