yosys/tests at 0913e968f59aed413dcb9bc5e392a554e2711ad7 - yosys - Gitea: Git with a cup of tea

luke/yosys

mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-01 10:39:10 +02:00

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Clifford Wolf 7815f81c32 Added "synth" command

2014-09-14 16:09:06 +02:00

..

Added autotest -e (do not use -noexpr on write_verilog)

2014-08-30 18:34:07 +02:00

Cosmetic changes to FSM tests

2014-08-21 17:40:49 +02:00

Added autotest -e (do not use -noexpr on write_verilog)

2014-08-30 18:34:07 +02:00

Added SAT-based write-port sharing to memory_share

2014-07-19 15:33:55 +02:00

Added note to "make test": use git checkout of iverilog

2014-07-16 10:03:07 +02:00

Added yet another resource sharing test case

2014-07-20 21:15:01 +02:00

Added "wreduce" to some of the standard test benches

2014-08-03 20:22:33 +02:00

Added multi-dim memory test (requires iverilog git head)

2014-08-12 10:37:47 +02:00

Changed tests/techmap/mem_simple_4x1_map for new $mem/$memwr WR_EN interface

2014-07-16 14:08:51 +02:00

Added "synth" command

2014-09-14 16:09:06 +02:00

Added tests/various/constmsk_test.ys

2014-09-04 15:07:30 +02:00

Added "wreduce" to some of the standard test benches

2014-08-03 20:22:33 +02:00