yosys/backends at 080a5ca536bcd7140ea3dc12483e49a8f076cd92 - yosys - Gitea: Git with a cup of tea

luke/yosys

mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-02 20:59:01 +02:00

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Eddie Hung 080a5ca536 Improve debugging message for comb loops

2019-06-26 20:02:38 -07:00

..

Improve debugging message for comb loops

2019-06-26 20:02:38 -07:00

Fix handling of offset and upto module ports in write_blif, fixes #1040

2019-05-25 17:45:14 +02:00

Add proper error message for btor recursion_guard

2019-05-24 16:22:34 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Fix static shift operands, neg result type, minor formatting

2019-05-21 13:04:56 -07:00

Support filename rewrite in backends

2019-06-18 14:39:52 -07:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Fix json formatting

2019-06-21 20:01:40 +02:00

Support filename rewrite in backends

2019-06-18 14:39:52 -07:00

Fix typographical and grammatical errors and inconsistencies.

2019-01-02 13:12:17 +00:00

Add timescale and generated-by header to yosys-smtbmc MkVcd

2019-06-16 23:12:03 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

Fix handling of partial init attributes in write_verilog, fixes #997

2019-05-07 19:55:36 +02:00