yosys/techlibs/analogdevices
Krystine Sherwin 02dd7a7624 analogdevices: Native LUTRAM primitives 2026-01-05 07:56:00 +00:00
..
Makefile.inc Create synth_analogdevices 2026-01-05 07:56:00 +00:00
abc9_model.v Create synth_analogdevices 2026-01-05 07:56:00 +00:00
arith_map.v analogdevices: update timing model 2026-01-05 07:56:00 +00:00
brams.txt Create synth_analogdevices 2026-01-05 07:56:00 +00:00
brams_defs.vh Create synth_analogdevices 2026-01-05 07:56:00 +00:00
brams_map.v Create synth_analogdevices 2026-01-05 07:56:00 +00:00
cells_map.v Create synth_analogdevices 2026-01-05 07:56:00 +00:00
cells_sim.v analogdevices: Native LUTRAM primitives 2026-01-05 07:56:00 +00:00
cells_xtra.py Create synth_analogdevices 2026-01-05 07:56:00 +00:00
cells_xtra.v analogdevices: remove some extra cells! 2026-01-05 07:56:00 +00:00
dsp_map.v Create synth_analogdevices 2026-01-05 07:56:00 +00:00
ff_map.v test suite 2026-01-05 07:56:00 +00:00
lut_map.v analogdevices: update timing model 2026-01-05 07:56:00 +00:00
lutrams.txt analogdevices: Native LUTRAM primitives 2026-01-05 07:56:00 +00:00
lutrams_map.v analogdevices: Native LUTRAM primitives 2026-01-05 07:56:00 +00:00
mux_map.v Create synth_analogdevices 2026-01-05 07:56:00 +00:00
retarget_map.v analogdevices: user retargeting 2026-01-05 07:56:00 +00:00
synth_analogdevices.cc analogdevices: LUTRAM config 2026-01-05 07:56:00 +00:00