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luke
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yosys
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0217ea0fb82b9170bb6efce734f1965ff2b181e7
yosys
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techlibs
T
History
Clifford Wolf
279a18c9a3
Added synth_xilinx -retime -flatten
2015-01-17 20:47:18 +01:00
..
cmos
Added test comments to techlibs/cmos/cmos_cells.lib
2014-01-29 10:51:02 +01:00
common
Added cells.lib
2015-01-16 15:50:42 +01:00
xilinx
Added synth_xilinx -retime -flatten
2015-01-17 20:47:18 +01:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00