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00544cffab17cbc6e4c7bf1b34cb41b8949e3aa4
yosys
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techlibs
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xilinx
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tests
T
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Marcin Kościelnicki
7e0e42f907
xilinx: Add simulation model for DSP48 (Virtex 4).
2020-01-29 01:40:00 +01:00
..
.gitignore
xilinx: Add simulation model for DSP48 (Virtex 4).
2020-01-29 01:40:00 +01:00
bram1_tb.v
…
bram1.sh
…
bram1.v
…
bram2_tb.v
…
bram2.sh
…
bram2.v
…
test_dsp48_model.sh
xilinx: Add simulation model for DSP48 (Virtex 4).
2020-01-29 01:40:00 +01:00
test_dsp48_model.v
xilinx: Add simulation model for DSP48 (Virtex 4).
2020-01-29 01:40:00 +01:00
test_dsp48a1_model.sh
xilinx: Test our DSP48A/DSP48A1 simulation models.
2019-12-23 20:36:43 +01:00
test_dsp48a1_model.v
xilinx: Test our DSP48A/DSP48A1 simulation models.
2019-12-23 20:36:43 +01:00
test_dsp_model.sh
xilinx: Test our DSP48A/DSP48A1 simulation models.
2019-12-23 20:36:43 +01:00
test_dsp_model.v
…
