yosys/examples/intel/asicworld_lfsr/runme_presynth at macc_v2 - yosys - Gitea: Git with a cup of tea

luke/yosys

mirror of https://github.com/YosysHQ/yosys.git synced 2026-08-22 06:07:26 +02:00

Files

T

dh73 c27dcc1e47 Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs

2017-04-05 23:01:29 -05:00

5 lines

85 B

Bash

Executable File

Raw Permalink Blame History

 #!/bin/bash
 iverilog -o presynth lfsr_updown_tb.v lfsr_updown.v &&\
 vvp -N presynth