mirror of https://github.com/YosysHQ/yosys.git
13 lines
329 B
Plaintext
13 lines
329 B
Plaintext
read_verilog -icells <<EOT
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module top(input C, D, R, output Q);
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$_DFF_PP0_ ff (.C(C), .D(D), .R(R), .Q(Q));
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endmodule
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EOT
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dfflibmap -liberty dfflibmap_resetval_clobber.lib top
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read_liberty dfflibmap_resetval_clobber.lib
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flatten -noscopeinfo
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opt_clean
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select -assert-count 1 t:* top %i
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select -assert-count 1 t:$_DFF_PP0_ top %i |